Every oscillator textbook cites the Barkhausen criterion: for sustained oscillation, the loop gain must equal exactly 1 (0 dB) and the loop phase shift must equal 0° (or an integer multiple of 360°). Simple enough. But in a real circuit, "exactly 1" is a razor-thin knife edge that no analog circuit can hold. Understanding what actually happens explains why oscillators either refuse to start, take seconds to reach amplitude, or clip against the rails.

The trick every working oscillator uses: design the small-signal loop gain to be greater than 1 (typically 2–3×), then rely on a nonlinear amplitude-limiting mechanism to pull the gain back down to exactly 1 at steady state. Without excess starting gain, thermal noise never builds; without a limiter, the amplitude grows until something clips or saturates.

The three limiting strategies you'll encounter:

• Soft limiting (AGC): A Wien bridge with an incandescent lamp or JFET in the negative feedback path. As amplitude rises, the lamp's filament heats and its resistance increases, reducing gain. Yields extremely low THD (<0.01%) because the limiter never enters a nonlinear region during a cycle.
• Diode clamp limiting: Back-to-back diodes across a feedback resistor clip amplitude at ~±0.6 V. Fast and cheap, but introduces harmonics — typical THD 1–3%.
• Hard rail clipping: Amplifier saturates against the supply. Ugly square-ish waveform, but works for square-wave oscillators (relaxation, ring) where you want the clipping.

Rule of thumb for startup time: If your small-signal loop gain is A and your loop bandwidth is f_BW, amplitude grows exponentially with time constant τ ≈ 1 / [2π·f_BW·(A−1)]. To reach usable amplitude from ~10 μV of thermal noise up to 1 V takes roughly 12 time constants (ln(10⁵) ≈ 11.5).

Concrete example: A 1 kHz Wien bridge with loop gain 1.1 (only 10% margin) and Q ≈ 0.33 has a loop bandwidth around 3 kHz. Startup time constant τ ≈ 1/(2π·3000·0.1) ≈ 530 μs. Reaching full amplitude takes ~6 ms — noticeable but tolerable. Drop the margin to 1.01 (1% excess) and startup balloons to 60 ms. This is why marginal Wien bridges appear to "not oscillate" — they eventually do, but you got bored watching.

Debugging a dead oscillator: Measure the loop gain by breaking the loop and injecting a small signal at the target frequency. If |A| < 1.5, add more gain. If the loop phase is off by more than ±10°, your frequency-selective network isn't peaked where you think it is — check component tolerances, especially electrolytics and inductor DCR.