Imagine handing an AI a blank text editor and saying: "design me a custom silicon chip that accelerates AI inference." Then walk away for three and a half days. When you come back, the chip is done — designed, verified, and ready to fab. That's roughly what this paper describes.

The Verkor team's earlier work, Design Conductor (December 2025), already turned heads: an LLM-based agent that autonomously designed a 5-stage RISC-V CPU capable of booting Linux, in about 12 hours. Impressive, but a CPU like that is well-trodden territory — the kind of thing graduate students build as a class project. The new version, Conductor 2.0, tackles something dramatically harder: a TurboQuant inference accelerator. That's a specialized chip for running quantized neural networks (models compressed to use fewer bits per weight, which makes them faster and cheaper to run). Designing one involves novel datapaths, custom memory hierarchies, and tight numerical correctness — a real engineering project, not a textbook exercise.

Two things changed between versions:

• Better models. The April 2026 frontier LLMs are simply more capable at long-horizon reasoning and code generation than what was available five months earlier.
• Better harness. The "harness" is the scaffolding around the model — how multiple agents coordinate, how they call simulation tools, how they review each other's work, how context is managed across days of operation. The team rebuilt this multi-agent system to handle tasks roughly 80× larger than before.

The headline number — 80 hours — is significant because it's the kind of project that might take a small team of human ASIC engineers months. And the agent did it "fully autonomously," meaning no human stepping in to fix the bug at hour 47 or rewrite the testbench at hour 62.

The deeper point isn't really about this one chip. It's about the slope. In five months, the same research group went from "12-hour CPU" to "80-hour custom accelerator" — a roughly 7× increase in wall-clock task duration and an 80× increase in task complexity. If that slope continues, the question of "what counts as a hard hardware design problem for an AI agent" looks very different a year from now. Hardware design has historically been a stronghold of human expertise because it requires deep cross-domain reasoning across architecture, RTL, verification, timing, and physical constraints. This paper suggests that wall is starting to crack.