Robert Noyce's "Semiconductor Device-and-Lead Structure": The 1959 Patent That Made the Integrated Circuit Manufacturable — and Built Silicon Valley

2026-06-06

On July 30, 1959, six months after Jack Kilby filed his lumpy germanium "miniaturized circuit" at Texas Instruments, a 31-year-old physicist at the newly founded Fairchild Semiconductor filed a quieter, stranger patent. Robert Noyce's US Patent 2,981,877 — "Semiconductor Device-and-Lead Structure" — didn't claim the integrated circuit as a concept. It claimed something far more important: a way to actually build one at scale.

Kilby's IC was a proof of existence. Wires were soldered by hand, jumping across the surface of a germanium bar like tiny golden trapeze artists. It worked exactly once, in a lab, in front of executives. Noyce's patent solved the manufacturing problem nobody else had even framed yet.

What it actually did: Noyce proposed taking a silicon wafer, growing a layer of silicon dioxide on top (using Jean Hoerni's brand-new planar process, filed weeks earlier), etching tiny windows through that oxide, and then evaporating thin aluminum lines directly onto the flat surface to connect transistors, resistors, and diodes built into the silicon below. The oxide insulated the metal from everything it wasn't supposed to touch. No wires. No solder. No human hands.

Read that again. In one patent, Noyce described:

Kilby invented the idea. Noyce invented the industry.

The legal war: TI and Fairchild fought for a decade. In 1969, the Court of Customs and Patent Appeals ruled in Noyce's favor on the key interconnect claims. The companies eventually cross-licensed and split roughly $30 million in royalties through the 1970s — a pittance compared to what each technique would generate. Kilby got the 2000 Nobel Prize (Noyce had died in 1990 and was ineligible). History gave Kilby the laurel; Noyce gave history the supply chain.

The modern echo is total. Every step in a 2026 EUV lithography fab — ASML's $380 million machines patterning lines 13 nanometers wide using tin-plasma light — is a direct descendant of Noyce's 1959 claims. The "back-end-of-line" copper interconnect stack on a modern GPU? Still oxide-isolated metal lines deposited on a planar surface. Chiplets and 3D stacking are extensions, not replacements: each layer is still a Noyce-style planar die. TSMC's $20 billion Arizona fab is, in a real engineering sense, a 2,000-step refinement of Figure 1 in patent 2,981,877.

Noyce went on to co-found Intel in 1968 with Gordon Moore, where the planar process he patented met the scaling law Moore predicted. The collision produced the microprocessor, the PC, the smartphone, and the data center. Every transistor in the device you're reading this on was placed using the descendants of one Fairchild patent — filed by a Grinnell College physicist who insisted, against his lawyers, on writing the claims himself.

Key Takeaway: Kilby invented the integrated circuit, but Noyce's 1959 planar-interconnect patent made it manufacturable — and every chip in every device built since is a direct descendant of those claims.

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