We covered sample-and-hold earlier, but there's a related circuit worth dissecting on its own: the track-and-hold (T/H). They look identical on a schematic — switch, hold capacitor, buffer — but their operating philosophies differ, and confusing them will bite you when designing fast ADC front-ends.

The distinction: A sample-and-hold spends most of its time in hold mode, briefly closing the switch to grab a snapshot. A track-and-hold spends most of its time in track mode, with the output continuously following the input, and only opens the switch at the precise sampling instant. For high-speed pipelined ADCs running at 100 MSPS or more, the T/H is almost always what's actually inside the chip, because the input buffer needs to be settled and ready the moment you command "hold now."

Why this matters in practice: In track mode, the hold capacitor C_H plus the switch on-resistance R_on form a low-pass filter with bandwidth f = 1/(2π·R_on·C_H). If you're tracking a 50 MHz signal with R_on = 50 Ω and C_H = 5 pF, your tracking bandwidth is about 640 MHz — plenty. But shrink C_H too far and kT/C noise dominates: V_noise(rms) = √(kT/C). At room temp with C_H = 1 pF, that's 64 µV rms — already eating into a 12-bit ADC's LSB at a 1 V range.

Real-world example: The ADI AD9434 (12-bit, 500 MSPS) uses an internal T/H. Its datasheet specifies an analog input bandwidth of 1.4 GHz — far above Nyquist — precisely because the T/H must track the input cleanly during the brief track window between conversions. If you tried to drive it with a high-impedance op-amp (say, an OPA350 at 38 MHz GBW), the source couldn't recharge C_H fast enough between samples, and you'd see gain droop and harmonic distortion above a few MHz.

The "kickback" problem: When the switch transitions from track to hold, charge injection from the MOSFET gate (typically 0.1–1 pC) dumps onto C_H, causing a pedestal error. Differential T/H topologies cancel this to first order. The rule of thumb: pedestal voltage = Q_inj / C_H. With 0.5 pC and C_H = 5 pF, that's 100 mV — huge — which is why real designs use bottom-plate sampling and dummy switches.

Practically: when picking an ADC driver amp, check the datasheet's charge-recovery time spec, not just bandwidth. A driver needs to settle the kickback from C_H in less than half the sample period.