Intel CDP (Code and Data Prioritization): How CPUs Let You Partition L3 Between Instructions and Data

2026-08-25

CDP is an extension of Intel's Cache Allocation Technology (CAT) that splits the L3 partitioning knob in two: instead of one bitmask per class of service (CLOS) controlling all L3 fills, you get separate bitmasks for code fetches and data fetches. Same silicon, finer control.

Why bother? Because instructions and data have wildly different access patterns and reuse profiles. A JIT compiler streaming megabytes of newly-emitted code through L3 can evict the hot data working set of every other process on the socket. A giant memcpy can flush the instruction footprint of your latency-sensitive service. Regular CAT treats both fills the same — CDP lets you say "this workload can splash code across 8 ways but only touch 2 ways for data."

The mechanism. When CDP is enabled (via IA32_L3_QOS_CFG MSR bit 0), each CLOS entry doubles: CLOS 0 becomes CLOS 0 code + CLOS 0 data, so a 16-CLOS system halves to 8 usable CLOSes. The L3 controller checks whether the incoming fill is an instruction fetch or a data load, then applies the corresponding bitmask to pick which ways are eligible. Hits are unaffected — CDP only constrains where new lines can land, not what you can read.

Real-world example. Consider a database server co-located with a log processor on a 20-way L3. The database has a hot 4MB index it re-reads constantly (data) and a compact hot path (code). The log processor streams GBs of raw log data (data) but its code is tiny. Naive CAT gives each 10 ways; the log processor's data stream still thrashes the database's index. With CDP:

Result: the logger's data fills are confined to a 4-way "streaming lane" while the database keeps its index resident.

Rule of thumb. Enable CDP when your workload mix has an asymmetric code-vs-data footprint: JIT-heavy runtimes (code churn), streaming ETL jobs (data churn), or interpreters (small code, huge data). If code and data behave similarly, CDP just halves your CLOS count for no benefit — stick with plain CAT.

The catch. CDP is a socket-wide toggle; you can't enable it per-core. Flipping it invalidates existing CLOS configurations, so it's a boot-time decision in practice. And it doesn't help if the pressure is inside L1/L2 — CDP only steers L3 allocation.

See it in action: Check out Acer ssd in not visible - Intel VMD Intel 11 and 12 gen not visible by Quick Solutions to see this theory applied.
Key Takeaway: CDP splits each L3 partition into separate code and data bitmasks, letting you contain streaming instruction or data floods that would otherwise evict a co-tenant's hot working set.

All newsletters