In July 1985, a small semiconductor company in Bristol, England, shipped the T414 Transputer — a 32-bit microprocessor with something no other chip had: four bidirectional serial links designed to be soldered directly to the links of other Transputers. You didn't build a Transputer system. You built a Transputer fabric. Wire four together, get four times the compute. Wire a thousand together, get a supercomputer.

Inmos was founded in 1978 with a £50 million grant from the Labour government's National Enterprise Board. Chief architect David May, working with C.A.R. Hoare's Communicating Sequential Processes (CSP) theory, designed the Transputer around a single premise: parallelism should be a hardware primitive, not a library. The instruction set had built-in send and receive opcodes. A dedicated language, Occam, expressed concurrency directly. Context switches took roughly one microsecond because they were baked into silicon.

The follow-on T800 (1987) added an on-chip floating-point unit — 1.5 MFLOPS at 20 MHz, competitive with Cray-1 vector performance per dollar. Meiko Scientific's Computing Surface strapped hundreds of T800s together and sold them to CERN, Edinburgh, and the U.S. Army. The Archimedes' rival ATW-800 workstation, the Parsytec supercomputers used by German aerospace firms, and the U.K.'s Alvey research programme all ran on Transputers.

Then came the T9000. Announced in 1991, it promised 200 MIPS, 25 MFLOPS, a superscalar pipeline, and 100 Mbit/s DS-Links routed through a companion C104 packet switch — essentially a network-on-chip years before that phrase existed. The T9000 slipped. And slipped. When it finally sampled in 1994, it ran at a fraction of the promised clock, the pipeline had catastrophic hazards, and SGS-Thomson (which had absorbed Inmos in 1989) killed the flagship configuration in 1996. Occam was orphaned. The chiplet ecosystem died with it.

Why it failed: a genuinely hard superscalar redesign collided with Thomson's post-acquisition cost cutting, workstation vendors standardized on RISC (SPARC, MIPS, PA-RISC), and the workstation-to-PC migration made "one fast processor" economically dominant over "many small ones" for a decade.

Why it works now:

• Message passing is mainstream. Go's channels, Erlang's actors, Rust's async, Kubernetes' pods — every modern concurrency model is a rediscovery of CSP. Occam got there in 1983.
• Network-on-chip is standard. Every ARM SoC uses AMBA/CHI mesh interconnects. AMD's Infinity Fabric, Intel's Foveros, and the UCIe chiplet standard (2022) are literally Transputer links with fatter pipes.
• The many-core comeback. Cerebras (900,000 cores), Tenstorrent's Grayskull, Graphcore's IPU, and Groq's LPU are all Transputer-shaped: small compute tiles with local memory and explicit inter-tile links. Graphcore was even founded in Bristol by two ex-Inmos engineers.
• Silicon photonics (Ayar Labs, Lightmatter, 2024–2026) delivers what Inmos wanted: dozens of terabit links per chip edge, making Transputer-style meshes bandwidth-competitive with monolithic dies.
• The AI workload matches the architecture. Transformer inference is embarrassingly parallel dataflow — precisely what a Transputer mesh was optimal for and what a monolithic superscalar CPU is worst at.

Modern silicon can build what David May sketched in 1983: a fabric of thousands of small, cheap tiles, each with local memory, each connected by high-speed serial links, programmed in a CSP-native language. We call the result "AI accelerator." Inmos called it Tuesday.