When you plug a board into a powered backplane, the bulk input capacitors on that board look like a dead short. A 470 µF cap charging from 12 V through milliohms of contact resistance will pull hundreds of amps for microseconds, arcing the connector pins, glitching the backplane voltage, and resetting every other card in the chassis. Hot-swap controllers solve this by inserting a MOSFET in series with the supply and turning it on slowly, controlling inrush current to a safe, predictable value.

The core circuit is an N-channel MOSFET in the positive rail, a sense resistor for current measurement, and a controller IC (LTC4215, TPS2490, ADM1075) that regulates the gate voltage. During startup, the controller operates the FET in its linear region — not saturation — actively dissipating power while the downstream capacitance charges. This is the opposite of normal MOSFET switching, where you want to cross the linear region as fast as possible.

Three things must be designed together:

• Current limit — set by R_SENSE. Typical threshold is 50 mV, so for a 5 A limit use R_SENSE = 50 mV / 5 A = 10 mΩ.
• dV/dt ramp rate — set by a capacitor from the FET gate to source (or a dedicated GATE pin cap). This determines how fast the output rises.
• Safe Operating Area (SOA) — the FET must survive the inrush energy. Power dissipation is P = V_DS × I_LIMIT, and this lasts for t = C_LOAD × V / I_LIMIT.

Worked example: A 12 V blade server card with 1000 µF of bulk capacitance, current-limited to 3 A. Charging time t = (1000 µF × 12 V) / 3 A = 4 ms. Peak FET dissipation at the start (full 12 V across it) = 12 V × 3 A = 36 W. You need a MOSFET whose SOA curve allows 36 W for 4 ms at 12 V V_DS — check the datasheet's transient SOA plot, not just the steady-state R_DS(on).

Modern controllers add a circuit-breaker function: if current exceeds limit for longer than a programmed timeout (set by a timer capacitor), the FET latches off to protect itself. They also include power-good outputs that hold downstream loads in reset until V_OUT has stabilized, and many provide I²C telemetry reporting actual current, voltage, and fault history.

Layout note: the sense resistor needs Kelvin connections, and the gate trace should be short with no via-induced inductance — a few nH plus the FET's input capacitance will turn your soft-start into a parasitic oscillator.