The Colpitts oscillator is the capacitive dual of the Hartley: instead of tapping an inductor, it taps a capacitive divider to derive feedback. This one architectural choice — two caps in series across a single inductor — makes the Colpitts the dominant topology in modern RF because capacitors are cheaper, more accurate, and far lower-loss at VHF/UHF than tapped inductors.

The core topology. A tank consists of inductor L in parallel with the series combination of C1 and C2. The junction between C1 and C2 provides the feedback tap. In a common-base or common-gate configuration, the emitter/source connects to the tap, the collector/drain drives the top of the tank, and the base/gate sits at AC ground. The transistor supplies the negative resistance that cancels tank losses.

Design equations. The resonant frequency uses the series combination of the two caps:

• C_eq = (C1 × C2) / (C1 + C2)
• f₀ = 1 / (2π√(L·C_eq))
• Feedback ratio: β = C1 / C2 (voltage divider from tap to top of tank)

Loop gain rule of thumb. For reliable startup, you need loop gain ≥ 3 at f₀. This means g_m × R_tank × (C1/C2) ≥ 3. Pick C1/C2 between 0.1 and 0.25 — smaller ratios starve the loop, larger ratios load the tank and kill Q.

Concrete example: 10 MHz Colpitts with a 2N3904. Choose L = 2.2 µH. For 10 MHz, C_eq = 1/((2π·10⁷)² · 2.2×10⁻⁶) ≈ 115 pF. Pick C1 = 150 pF and C2 = 470 pF → C_eq = 114 pF ✓. Feedback ratio β = 150/470 = 0.32. With I_C = 2 mA, g_m ≈ 77 mS. If loaded Q gives R_tank ≈ 5 kΩ, loop gain ≈ 77mS × 5kΩ × 0.32 = 123 — plenty of margin, so an AGC or amplitude-limiting mechanism (typically self-biasing through the emitter) will clamp the swing.

Why it dominates over Hartley. Tapped inductors are hand-wound nightmares above 30 MHz; capacitive dividers are two 0402 parts. Also, the two caps can absorb the transistor's C_be and C_ce — parasitics that would detune a Hartley become part of the design. This is why the Clapp variant (adding a third series cap C3 with the inductor) is standard for crystal oscillators: C3 dominates and desensitizes f₀ from transistor capacitance drift with temperature and bias.

Practical pitfalls. Keep the C1-C2 junction lead short — inductance here shifts the feedback phase and can move oscillation to a spurious mode. Bypass the base thoroughly; any base impedance turns your common-base stage into a lossy common-emitter with poor high-frequency gain.