This is a final project demo from Cornell's ECE 5760 (Advanced Microcontroller Design), a course that consistently produces some of the most ambitious FPGA work on YouTube. Three students — Utku Melemetci, Sam Keamy, and Peter He — tackle one of the harder problems in modern video: hardware-accelerating AV1 decoding.

AV1 is the royalty-free successor to H.264/HEVC, and it is notoriously computationally expensive to decode in software. That's exactly why hardware acceleration matters: phones, TVs, and streaming devices all rely on dedicated silicon to play AV1 efficiently. Building a partial decoder on an FPGA is a serious undertaking — you have to grapple with entropy coding, transform blocks, motion compensation, and loop filtering, then figure out which pieces actually benefit from parallel hardware versus staying on the soft-core CPU.

What makes the ECE 5760 project demos worth watching is that they're not polished marketing pieces. The students walk through their actual architecture — what they put in hardware, what stayed in software, where they hit memory bandwidth limits, and what trade-offs they made to fit on the DE1-SoC. For anyone interested in video codecs, hardware/software co-design, or just seeing what's achievable in a one-semester FPGA project, this is a great look.

Pair it with the linked project webpage for the full writeup including Verilog source.