The standard cascode boosts gain by stacking transistors, but it eats headroom — you need at least four V_DS,sat drops between rails. On a 1.8 V supply, that's a non-starter. The folded cascode solves this by "folding" the signal path sideways instead of stacking it vertically, giving you cascode-like gain while preserving most of the supply for signal swing.

The trick is current redirection. Instead of stacking the cascode transistor on top of the input transistor (both NMOS, say), you route the input pair's drain current into a node that's also fed by a PMOS current source. The cascode device — now PMOS — steals current away from that node. The signal current "folds" 180°: AC current flowing up in the input device flows down through the cascode. Same gain mechanism (cascode raises output impedance), but only two V_DS,sat stack heights from each rail.

Why this matters for input range: In a telescopic cascode op-amp, the input common-mode range is squeezed by the tail current source plus four stacked devices above it. In a folded cascode, the input pair sits alone above the tail — the common-mode input can swing nearly to one rail. This is why folded cascodes dominate in rail-to-rail input op-amps and modern CMOS designs running on 1.2–3.3 V.

Concrete example: The classic AD8676 precision op-amp uses a folded cascode input stage to achieve 35 V/μs slew with sub-microvolt offset on supplies as low as ±2.25 V. In data converters like the AD7124 24-bit Σ-Δ ADC, folded cascodes provide the >120 dB open-loop gain needed for the input buffer without burning supply headroom that the modulator needs.

The tradeoff is power and noise. You now have two bias currents flowing — one through the input pair, one through the cascode branch. The PMOS current sources at the top contribute thermal and 1/f noise directly to the output. Total current is typically 2× a telescopic cascode for the same g_m.

Quick design rule: For a target DC gain A_v ≈ g_m1·(R_out,n ∥ R_out,p), where each R_out is roughly (g_m·r_o)·r_o of the cascode branch. With g_m·r_o ≈ 30 per device in modern CMOS, you get ~60–80 dB gain per stage easily. Size the PMOS current source larger than the input bias current — typical ratio is 1.2× to 1.5× — so the cascode branch still has bias when the input swings hard.