When a sigma-delta ADC spits out a 100 MHz stream of 1-bit samples and you need a 1 MHz stream of 16-bit samples, you have a problem: filtering at 100 MHz with a conventional FIR would need dozens of parallel multipliers. Eugene Hogenauer solved this in 1981 with the Cascaded Integrator-Comb (CIC) filter — a decimation/interpolation structure that uses only adders, subtractors, and delays. No multipliers, no coefficients to store, no ROM.

The topology is beautifully symmetric. For decimation by factor R:

• N integrators run at the fast input rate. Each is just y[n] = y[n-1] + x[n] — one adder and one register.
• A rate change throws away R-1 out of every R samples (a free operation — you just clock the downstream logic slower).
• N comb stages run at the slow output rate. Each is y[n] = x[n] - x[n-M] — one subtractor and M registers.

Interpolation is the mirror image: combs first at the low rate, then zero-stuffing, then integrators at the high rate.

The magic trick that makes this work: The integrator at high rate has infinite DC gain and will overflow. But because 2's complement arithmetic wraps around modulo 2^B, and because the comb stage subtracts a delayed copy at the low rate, the wraparound cancels out exactly — provided the register width B accommodates the maximum signal swing. The bit-growth formula:

B_out = ceil(N·log₂(R·M)) + B_in

For a 5-stage CIC decimating by R=64 with differential delay M=1 and 1-bit input: B_out = ceil(5·log₂(64)) + 1 = 31 bits. Yes, 31-bit integrator registers to filter a 1-bit signal. Hardware people don't care — flip-flops are cheap.

Real-world example: Every cellular baseband chip contains CIC filters in its digital down-converter. A 4G/LTE receiver samples the antenna at ~245 MHz, then a CIC decimates by 32 or 64 down to something the channel-select FIR can handle at ~8 MHz. Without CIC, you'd need a 200-tap FIR running at 245 MHz — hundreds of multipliers burning watts. With CIC, you have ~10 adders running at 245 MHz and the multiplier-heavy FIR runs at 8 MHz.

The tradeoff: CIC frequency response is (sin(πfRM)/sin(πf))^N — a sinc^N shape with significant passband droop near the edge. You almost always follow a CIC with a small compensation FIR that boosts the high-frequency corner back flat.