Take an inverter. Feed its output back to its input. The output wants to be the opposite of itself — which is a contradiction. In an ideal world it would settle at the metastable midpoint (Vdd/2). In the real world, a single inverter usually does settle there, because the feedback is instantaneous compared to the gate delay. But chain three inverters (or any odd number), close the loop, and the contradiction now has to propagate through three gate delays before it bites itself. The result oscillates forever.

The frequency is determined by the loop delay:

f = 1 / (2 × N × t_pd)

where N is the number of stages and t_pd is the propagation delay per inverter. The factor of 2 is because a full period requires a signal to traverse the loop twice (once for each polarity). For 5 inverters at 50 ps each: f = 1 / (2 × 5 × 50ps) = 2 GHz.

Ring oscillators show up everywhere in real chips:

• Process monitors: A ring oscillator's frequency is a direct readout of how fast the local silicon is. Foundries embed dozens across the die. A "fast" corner part might run its 31-stage RO at 800 MHz; a "slow" corner part at 500 MHz. The chip can read this back and adjust voltage or clock frequency accordingly (adaptive voltage scaling).
• True random number generators (TRNGs): Ring oscillators have phase noise. Sample one RO's output with another asynchronous RO's edge, and the jitter between them is genuinely random — sourced from thermal noise in the transistors. Many secure elements (smart cards, TPMs) use stacks of ROs XOR'd together as their entropy source.
• Physically Unclonable Functions (PUFs): Two nominally identical ROs on the same die will run at slightly different frequencies due to manufacturing variation. Compare 128 pairs and you get a 128-bit fingerprint unique to that specific chip — used for anti-counterfeiting and key generation.
• Voltage-controlled oscillators in PLLs: Replace the simple inverters with current-starved inverters whose delay depends on a control voltage. Now you have a VCO — the heart of every PLL.

Rule of thumb: A ring oscillator's frequency varies roughly linearly with supply voltage and inversely with temperature (hotter = slower carriers = longer delay). Expect about 0.3-0.5% frequency change per °C. This temperature sensitivity is why you never use a free-running RO as your system clock — but it's exactly what makes them useful as on-chip thermometers.

One last subtlety: an even number of inverters in a loop is a latch, not an oscillator. The contradiction resolves into a stable state. This is the same reason cross-coupled NAND/NOR latches work — and why SRAM cells use exactly two inverters, not three.