Cascode Current Mirrors: Boosting Output Impedance for High-Precision Bias

2026-08-23

A basic two-transistor current mirror has one dirty secret: its output current isn't really constant. As the voltage on the output node swings, the mirror transistor's collector-emitter voltage changes, and thanks to the Early effect, the collector current drifts. The output impedance of a simple mirror is just ro — typically 50–200 kΩ for a small-signal BJT, which sounds high until you're trying to bias a 1 MΩ gain stage and watching your operating point wander with signal swing.

The cascode current mirror stacks a second transistor on top of each mirror transistor. The upper "cascode" transistor shields the lower mirror transistor from output voltage swings, holding its VCE nearly constant. The result: output impedance multiplied by roughly the current gain of the cascode device, giving you an effective rout ≈ gm·ro² — often 10–100 MΩ.

Topology (BJT version): Q1 and Q2 form the standard mirror at the bottom. Q3 and Q4 sit above them as cascodes, with their bases tied together at a bias point roughly 2·VBE above ground (often generated by a diode-connected stack on the reference side). The reference current flows through Q3-Q1; the output current mirrors through Q4-Q2.

The tradeoff: You lose headroom. A simple mirror needs VCE(sat) ≈ 0.2 V at the output. A cascode mirror needs at least VCE(sat) + VBE ≈ 0.9 V — a serious problem for low-voltage designs. The Wilson mirror and wide-swing cascode variants recover some headroom by biasing the cascode transistors closer to their compliance limit.

Real-world example: The tail current source of an op-amp differential input pair. A garden-variety mirror giving 100 kΩ output impedance would let common-mode input swings modulate the tail current by microamps — degrading CMRR to maybe 60 dB. Swap in a cascode mirror with 10 MΩ output impedance and CMRR jumps by 40 dB, easily hitting 100 dB. This is why nearly every precision op-amp (OP27, AD8620, LT1028) uses cascoded bias inside.

Rule of thumb: Output impedance improvement ≈ β/2 for BJT cascodes, or roughly the intrinsic gain (gm·ro, typically 50–500) for MOSFET cascodes. If your simple mirror has 100 kΩ output impedance and β = 200, expect the cascoded version to hit ~10 MΩ. Verify with the design equation rout ≈ ro4·(1 + gm4·ro2).

See it in action: Check out Cascode Current Mirror Explained (with Simulation) by ALL ABOUT ELECTRONICS to see this theory applied.
Key Takeaway: Cascoding a current mirror trades ~0.7 V of headroom for roughly two orders of magnitude improvement in output impedance, and it's the standard trick behind high-CMRR op-amp bias circuits.

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