Every microcontroller datasheet has a nasty little clause buried in the electrical specs: the CPU is only guaranteed to behave correctly when V_DD is above some threshold (say 2.7 V) and rising cleanly. Below that, the internal logic can latch into undefined states, corrupt flash writes mid-operation, or wake up executing garbage. A voltage supervisor (also called a reset IC or brownout detector) is the tiny 3-pin chip that keeps the RESET pin asserted until the rail is legitimately alive — and yanks it back low the moment the rail sags.

Anatomy of a supervisor: internally it's a bandgap reference, a comparator with built-in hysteresis, and a timer. The comparator watches V_DD against a factory-trimmed threshold (typical values: 2.32 V, 2.63 V, 2.93 V, 4.38 V). When V_DD crosses above threshold, a monoshot holds RESET asserted for a fixed reset timeout (typically 140 ms to 200 ms) so the crystal oscillator, PLL, and internal regulators have time to stabilize. When V_DD dips below threshold minus hysteresis (usually 0.5–1%), RESET fires immediately.

Output flavors matter:

• Push-pull active-low (e.g., MAX809): drives RESET rail-to-rail. Simple, but you can't wire-OR multiple reset sources.
• Open-drain (e.g., MCP809, TPS3839): requires an external pull-up but lets you tie in a manual reset button, watchdog output, and JTAG debugger reset all on the same node.
• Windowed supervisors: assert reset if V_DD goes either too low or too high — critical for FPGA cores where overvoltage kills silicon.

Real-world example: An STM32L4 running at 3.3 V has a minimum operating voltage of 1.71 V, but flash write/erase requires at least 1.71 V held stable. If your battery-powered board sees the LiPo sag to 3.0 V during an LTE burst, the internal BOR might catch it — but with EEPROM writes in progress, you want an external supervisor like the TPS3839L30 (3.0 V threshold, 200 ms timeout, 150 nA quiescent). Below 3.0 V, RESET pulls low, the MCU aborts cleanly, and flash contents survive.

Rule of thumb — picking the threshold: set it about 5–10% above the MCU's minimum guaranteed V_DD, but below your nominal rail's lower tolerance. For a 3.3 V ±5% rail feeding an MCU rated down to 2.7 V: nominal low is 3.135 V, MCU minimum is 2.7 V — pick a 2.93 V supervisor. That gives 200 mV margin above the MCU limit and 200 mV below the rail's worst-case low, so normal operation never trips it but a real brownout does.

Watchdog combo chips (MAX6746, TPS3813) add a second input: if your firmware fails to pet a WDI pin within a windowed interval, RESET fires. This catches software hangs the internal watchdog misses (because a runaway CPU can disable its own peripheral watchdog, but it can't reach outside the chip).

Layout gotcha: place the supervisor's V_DD pin close to the MCU's V_DD pin, not near the regulator output. You want it sensing what the MCU sees, including IR drops in the power trace. And decouple it with its own 100 nF — supervisors are comparators, and comparator noise causes reset chatter.